Answered Essay: Consider the following change to the interrupt mechanism discussed in class.

Consider the following change to the interrupt mechanism discussed in class.
Suppose we are not concerned with protection issues—users are well behaved and they don’t use priviledged instructions and stay within their memory area.
Suppose now the mode bit is always 1, even in user program execution, since protection is not an issue.
when an interrupt occurs, hardware saves only the PC, not the PSW. Similarly, hardware loads from the Interrupt vector only the PC, not the PSW. RTI instruction reloads only the PC, not the PSW.
Any problems with this scheme?

Expert Answer

 

Answer:

Your scheme is pretty good but there are couples of changes that I would like you to make. that there is no cure from event driven errors and there is no cure for the Time-triggered system false. so for that what you can do is create a code in which you use the boolean expression in which one of these error occurs then it should always show 1-bit value and if the system and PSW are running fine then you can use the 0-bit.

This is only the change that I would like you to make.

Mode bit is always 1 states that there will be no error in the execution.

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